1. Product Introduction
The FPGA-based high-performance PCIe cipher card relies on the reconfigurable computing ASIC security chip as the SM2/SM3/SM4 algorithm chip to provide high-speed cryptographic algorithm services, and uses the 900,000-door FPGA chip (EQ6GL9) as the security system control module to realize the overall control and management of the cipher card, and its SM4 maximum processing rate can reach 12Gbps, which can be applied to all kinds of cryptographic security application systems, which can meet the high concurrency and high concurrency of the application system. The data encryption and decryption and digital signature requirements of multi-task parallel processing provide high-speed cryptographic computing capabilities to ensure the confidentiality, integrity and anti-repudiation of transmitted information.
The interface function of the cipher card conforms to the "GB-T 0018-2012 Cipher Device Application Interface Specification", and the cipher application system provides cryptographic services by calling the standard interface function of the cipher card, which can smoothly access various system platforms, and can be widely used in high-end SSL VPN, IPSec, security authentication, high-end server cipher machines, signature verification servers and other system platforms, with a wide range of application prospects.
2. Product structure
The hardware composition of the password card is divided into 6 modules: security encryption module, main control FPGA module, PCIe2.0 module, power module, clock module, and USB/JTAG interface module.
The block diagram is as follows:
The security encryption module can provide high-speed cipher computing services for multi-threaded and multi-card parallel processing for various security platforms, meet its requirements for digital signature/verification, asymmetric/symmetric encryption and decryption, data integrity verification, true random number generation, key generation and management, and ensure the confidentiality, authenticity, integrity and anti-repudiation of sensitive data.
The main control FPGA module uses the 920,000-door FPGA chip EQ6GL9 of Zhongke Yihai Micro Company to realize the management and control BMC (Board Management Controller) function of the encryption card, including:
Control the power-on/power-off timing of the security encryption module;
Power-off reset/hard reset for the security encryption module;
Support security encryption module boot mode selection and process monitoring;
Support temperature monitoring;
Support power monitoring;
Support overheating protection shutdown of security encryption module;
Communicates with the security encryption module via SPI;
Through the UART interface connected to the USB chip.
The PCIe module is a high-speed communication interface for security encryption cards, supporting PCIe2.0×16/8/4/1, and the interface specification is PCIe, which supports PCle 2.0. It is connected to the host through 8 pairs of differential lines for transmission and receiving, and the maximum transmission speed is 32 Gbps.
The power module provides power protection and power to the security cryptographic card, converting the input DC12V into the power supply required by the TSR-S10G and EQ6GL9 for multiple controllable timings.
The clock module provides multiple synchronous clocks for the security encryption card, for example: TSR-S10G requires a clock of 25MHz, EQ6GL9 requires a clock of 50MHz, etc.
USB/JTAG interface module, mainly for debugging and control functions, through this interface module host computer and security encryption card for control data, debugging data interaction. USB interface unit, can support up to 12M baud rate (default baud rate 115200bps)
3. Product specifications and configurations
| Product model |
ES20G |
Product Dimensions (Length, Width) |
168mm*69mm |
Electrical characteristics |
bus |
PCI-E 2.0 8x |
| power consumption |
≤20W |
| voltage |
12V |
| Mean time between failures |
>8,000Hours |
Environmental parameters |
Operating temperature |
10～35℃ |
| Non-condensing operating humidity |
10%～90% |
| Storage temperature |
-40～65℃ |
| Non-condensing storage humidity |
5%～95% |
4. Performance indicators
| Encryption algorithms |
Performance metrics |
| National Cryptography Algorithm |
SM2 |
signature |
60,000 times/second |
| verify |
45,000 times/sec |
| encrypt |
35000 times/sec |
| decrypt |
50,000 times/second |
| SM3 |
15Gbps |
| SM4 |
12Gbps |
| International algorithms |
| AES |
Encrypt and decrypt |
11Gbps |
| 3DES |
Encrypt and decrypt |
5 Gbps |
| SHA1 |
7Gbps |
| Other features |
| Random number generation |
2Mbps |
| Random source |
Double random source |
| Number of symmetric keys |
1024 pcs |
| Number of SM2 keys |
1024 pairs |
| file system |
5MB |
5. Product floor plan
