
| number | project | description |
| 1 | CLK | External Reference Clock Input Interface (SMA) |
| 2 | TRIG | External Trigger Input Interface (SMA) |
| 3 | AIN1 | Acquisition Signal Input Interface (SMA) |
| 4 | AIN2 | Acquisition Signal Input Interface (SMA) |
| 5 | PFI1 | Programmable Function Interface (SMA) |
| 6 | PFI2 | Programmable Function Interface (SMA) |
| Analog to digital conversion index | |
|
Project
|
Description
|
| Sampling rate | 3.2GSPS/6.4GSPS |
| Vertical resolution | 12-bit |
| Number of channels | 2 channels /1 channels |
| Analog bandwidth | DC-2GHz |
| Coupling mode | DC coupling |
| Input impedance | 50Ω |
| Input range | 800mVpp,hardware-adjustable |
| effectiveness | 8-bit@1000MHz |
| synchronism | <5ps(RMS) |
| External clock | |
|
Project
|
Description
|
| Input impedance | 50Ωsingle-ended |
| Coupling mode | AC |
| Signal amplitude | 0.35-2.4Vpp |
| Frequency stability | ≤25ppm |
| Frequency range | 10MHz/100MHz,Square wave/sine wave |
| External trigger | |
|
Project
|
Description
|
| Input impedance | Analog trigger: 2000Ω PFI trigger: 1000Ω |
| Coupling mode | Analog trigger: DC PFI trigger: DC |
| Input range | Analog trigger: 0~+2V PFI trigger: 0~+3.3V |
| Over threshold voltage | Analog trigger: 0~+2V, adjustable PFI trigger: ≥+2V |
| Dynamic parameter test | ||
| Input setting | AINI 50Ωinput impedance | |
| Input Frequency=98MHz SFDR=69.19 SNR=54.18 SINAD=53.94 THD=66.71 ENOB=8.85 |
Input Frequency=198MHz SFDR=71.51 SNR=54.22 SINAD=54.07 THD=68.92 ENOB=8.87 |
|


| Power demand | |
| Project | Description |
| Input voltage | 12V |
| Input current | 2A |
| power | 24W |
| Environmental adaptability | |
| Project | Description |
| Operating temperature | -20~+50℃ |
| Storage environment | -30~+70℃ |
| Working humidity | 10%~90%RH,non-condensing |
| Random vibration | 5~500Hz,0.3grms |
| Size and weight | |
| Project | Description |
| Size | PCIe 3U/1 slot 20mm×160mm×111mm(W×D×H) |
| weight | 0.38kg |