1. Product overview
The ADRV9002 is a high performance, high linearity, high dynamic range transceiver optimized for performance and power systems. The device is configurable and ideal for demanding, low-power, portable and battery-powered devices. The ADRV9002 operates at 30MHz to 6000MHz, covering UHF, VHF, Industrial, Scientific, and medical (ISM) bands, narrowband (kHz) cellular bands, and broadband operations up to 40MHz. The ADRV9002 can perform both TDD and FDD operations.
The transceiver includes direct conversion of the signal path with advanced noise index and linearity. Each complete receiver and transmitter subsystem includes DC offset correction, orthogonal error correction (QEC), and programmable digital filters, so these functions are no longer required in the digital baseband. In addition, it integrates several auxiliary functions such as an auxiliary analog-to-digital converter (ADC), an auxiliary digital-to-analog converter (DAC), and a universal input/output (GPIO), thus providing additional monitoring and control capabilities.
Fully integrated phase-locked loop (PLL) provides high-performance, low-power fractional N frequency synthesis for transmitter, receiver and clock segments. A full voltage controlled oscillator (VCO) and loop filter elements are integrated to minimize the number of external components. The local oscillator (LO) has flexible configuration options and includes a fast lock mode.
The transceiver has a low-power sleep and monitoring mode to save power and extend the battery life of portable devices while monitoring communications. The fully integrated low-power digital predistortion (DPD) is optimized for narrowband and wideband signals and enables the linearization of efficient power amplifiers.
The core of the ADRV9002 can be powered directly from 1.0V, 1.3V and 1.8V regulators and controlled via a standard 4-wire serial port. Other power supplies are used to provide the correct digital interface levels and to optimize receiver, transmitter and auxiliary converter performance. High and low data rate interfaces are supported with configurable CMOS or Low Voltage Differential Signal (LVDS) Serial synchronous interface (SSI) options.
2. Advantages and characteristics
• 2×2 highly integrated transceiver
• Frequency range from 30MHz to 6000MHz
• Transmitter and receiver bandwidths from 12kHz to 40MHz
• Two fully integrated decimal-n RF frequency synthesizers
• LVDS and CMOS synchronous serial data interface options
• Low power monitor and sleep mode
• Multi-chip synchronization function
• Fast frequency hopping
• Dynamic profile switching for dynamic data rate and sample rate
• Fully integrated DPD for narrowband and wideband waveforms
• Fully programmable via 4-line SPI
• 12mm x 12mm, 196 balls CSP_BGA
• Connection of FPGA motherboard (ZC706 and ZCU102) via FMC connector
• Powered by a single FMC connector
• Includes schematics, layout, BOM, HDL, drivers, and application software
3. Product application
• Mission-critical communications
• Very high frequency (VHF), ultra-high frequency (UHF), and cellular to 6GHz
• Time division duplex (TDD) and frequency division duplex (FDD) applications
