524-PCIe FMC fiber interface processing card based on MPSOC XCZU15EG

Item No.: 524
This board is based on MPSOC series XCZU15EG-FFVB1156 chip, with 4-core ARM Cortex-A53 and rich logic resources. ARM is equipped with a group of 64-bit DDR4, with a capacity of 4GB, and the maximum stable operation is 2400MT/s. Specific one channel USB3.0 interface, one channel gigabit network interface, one channel DP interface, two channel RS232, two channel Can interface; The board card has automatic power-on sequence and supports various startup modes, such as Nor Flash startup, EMMC startup, SD card startup and so on. The FPGA logical end extends the standard HPC FMC interface and connects eight GTH, LA, HA and HB buses. There are also two 40G QSFP optical fiber interfaces, supporting RapidIO, Aurora, and 40G Ethernet protocols. The board card design meets the industrial requirements and can be used in high-speed signal processing, vehicle-mounted radar signal processing and other fields.

Figure 2:ZU15EG board block diagram
2. Main function and parameters
The board function Parameters Content
PL end FMC FMC-HPCASP-134486-01
Optical fiber Two channel QSFP+,40G Ethernet, Aurora, RapidIO protocols are configurable
PCIe X8 Support PCIe2.0,3.0 protocol
PS end DDR DDR464-bit32GbThe maximum stable operation is 2400MT/s;
QSPI Flash QSPI x4 NorFlashEach tablet is 512Mb
SD Card Provide 16GB SD card
Storage DataFlash 16Mb of SPI interface
CAN FD controller Two channel CAN
Display Port Display Port 1.2a protocol standard is supported, and only output is supported
USB One channel USB3.0
internet One channel RJ45 Gigabit Ethernet
RS232 Two channel RS232
IO A set of 4 user-defined dial-code switches that multitest IO pins
Size 139mmX122.3mmX20mm
Weight with heat sink
Power supply voltage+12VDC±10%@5A
Power consumption 60W
Working temperature Industrial  -20℃ to +65℃
Support daughter board Orihard board FMC144FMC210FMC177FMC213FMC450FMC214

3. Software support
Software version :vivado 2018.3 programming language: Verilog
  •  PS end QSPI load testing code;
  • PS end EMMC loads the test code
  • PS end SD card loading test code
  • PS end DDR4 read and write test code
  • PS end gigabit network port transceiver test code
  • PS end RS232 interface read and write test code
  • PS end RS485 interface read and write test code
  • PS end CAN interface read and write test code
  • DataFlash READ and write test code for the SPI interface on the PL end
  • PL end QSFP+ interface ibert mode test code
  • PL end PCIe X8 V3.0 XDMA interface test software
  • Other GPIO signal connectivity test code
4.Application filed
High speed signal processing, analog, photoelectric access analysis.