520-Radar verification baseboard for AWR2243 based on ZU15EG

Item No.: 520
This board card is independently developed by our company, based on MPSOC series SOC XCZU15EG-FFVB1156 architecture, equipped with two groups of 64-bit DDR4, each with a capacity of 32 Gb, and can run stably at 2400MT / s. In addition, there is 1 channel
Description

Radar verification baseboard for AWR2243 based on ZU15EG


1. Overview of board card
This board card is independently developed by our company, based on MPSOC series SOC XCZU15EG-FFVB1156 architecture, equipped with two groups of 64-bit DDR4, each with a capacity of 32 Gb, and can run stably at 2400MT / s. In addition, there is 1 channel 10G  SFP + fiber interface, 1 channel 40G QSFP fiber interface, 1 channel USB3.0 interface, 1 Gigabit network interface and 1 DP interface. The card has automatic charging sequence and supports various starting modes, such as Nor Flash, EMMC, SD card, etc. The card can be connected to TI four AWR2243 MMWCAS-RF-EVM. Can be used in high speed signal processing. The design meets the industrial-grade requirements.
2. Hardware content
The hardware principle block diagram is as follows:

Figure 3: The principle block diagram of the ZU15EG board card

Hardware interface content
● PS terminal mounted a cluster of DDR 4, data bit width of 64-bit, capacity of 32 Gb, the highest stable operation at 2400MT / s;
● PS terminal mounted two pieces of QSPI x4 NorFlash, each piece of the capacity of 512 Mb, used for the system configuration program storage;
● PS terminal mount hang a piece of EMMC, 64 Gb capacity, can be used for system configuration program storage;
● PS terminal plug-in SD card interface, the maximum support search number of 8192 files, can be used for system configuration program storage;
● PS terminal is connected to Display Port interface, supporting Display Port 1.2a protocol standard, only support external output;
● PS terminal external road gigabit Ethernet interface, support 10 / 100 / 1000Mbps rate transmission;
● PS terminal external road USB3.0 interface, the maximum rate up to 5 Gbps;
● Card external road RS232 interface, from the PS terminal UART 0 out, can be used for system debugging and status information printing;
● Card external road RS485 interface, from the PS terminal UART 1, can be used for system debugging and status information printing;
● The board is connected to two CAN interfaces, led by the PS terminal;
● PL terminal mounted a cluster of DDR 4, data bit width of 64-bit, capacity of 32 Gb, the highest stable operation at 2400MT / s;
● PL terminal mounted a DataFlash of SPI interface with a capacity of 16 Mb, which can be used to store system parameter information;
● PL terminal external road QSFP interface, the maximum support of 40 Gbps data transmission rate;
● PL terminal external road SFP + interface, the maximum support of 10 Gbps data transmission rate;
● PL terminal is connected to two groups of 120-pin high-speed connectors, each group of connector supports 12 pairs of LVDS, 52 LVCMOS33;
● The card supports a solid state disk with M.2  PCIe x4 interface;
● The board card has a multi-channel user custom test IO pin;
● The board has a set of 4-user custom dial switch;
● Board card chips are all industrial-grade chips;
● Support 9V~36V voltage input range, with anti-reverse connection protection, overvoltage protection and other power supply protection functions;

3. Basic software content

● PS terminal QSPI loading test code;
● PS terminal EMMC loading test code;
● PS terminal SD card loading test code;
● PS terminal DDR 4 read and write test code;
● PS terminal gigabit network port to send and receive the test code;
● PS terminal RS232 interface read and write test code;
● PS terminal RS485 interface read and write test code;
● PS terminal CAN interface read and write test code
● PL terminal DDR 4 read and write test code;
● The DataFlash read and write test code of the PL-terminal SPI interface;
● PL terminal QSFP interface ibert mode test code;
● PL terminal SFP + interface ibert port mode test code;
● PL terminal M. 2 SSD interface test code;
● Other GPIO signal connectivity test code;

4. Platform software content

● Based on TI's driver program, ARM SDK software completes the configuration of TI's 4 cascade RF boards (MMWCAS-RF-EVM);
● Complete the development and debugging of SPI and control interface of cascade RF board by PL terminal program;
● The data receiving and framing of four RF chips AWR2443 based on LVDS interface were completed by PL terminal program. LVDS interface rate is not less than 450Mbps;
● Complete the PL-end program to store the baseband data after framing into DDR4 SDRAM at PS end through AXI_HP bus; The amount of data cached per second does not exceed 480MB;
The data in DDR4 SDRAM was transferred to PC in the form of FTP to save the file, and the correctness of the data was verified by Matlab program
● Complete the program integration and debugging of RS232, RS485, CAN and network port interfaces, only test the data transmission function, and do not involve business application data;

5. physical property

5.1 Physical characteristics

● Operating temperature: commercial grade 0℃ ~ + 55℃, industrial grade-40℃ ~ + 85℃
● Working humidity: 10%~80%

5.2 Power supply requirements

● Single power supply, the maximum power consumption of the whole board: 30W
● Voltage: + 12VDC ± 10%@5A,

6. Application field

High speed signal processing