1. Product Introduction
FMC456 is a high-resolution, high-sampling-rate ADC+DAC FMC daughter board. It supports two 14-bit 3.0/2.6/2.0GS/s A/D channel inputs and two 16-bit 12.6GS/s D/A channel outputs at the same time, and the full-power analog -3dB input bandwidth can reach 9GHz. This board supports trigger input or output; three clock modes: internal reference, external reference, and external clock. Multiple boards can be synchronized through the reference clock.
The electrical and mechanical design of the FMC456 board is based on the FMC standard (ANSI/VITA 57.1) and is connected to the FPGA carrier board through a high-density connector (HPC). The front panel I/O is equipped with 6 SSMC coaxial connectors. The FMC456 is designed with air-cooled and conduction-cooled versions, which can be adapted to a variety of general-purpose carrier boards for high-performance algorithm calculations.
2. Product Application
Software radio
Broadband MIMO applications
Digital beamforming
● Radar/sonar electronic warfare
● Physical experiments
● Signal Intelligence
● Aerospace and test equipment
3. Main specifications
● 6 SSMC connectors, 2 for analog signal input 1 (AD0) and analog signal input 2 (AD1); 2 for analog signal output 1 (DA0) and analog signal output 2 (DA1); one for external clock input (CLK); one for trigger input or output (TRG)
● Sampling frequency: 2 channels 16bits 12.6GS/s DA and 2 channels 14bit 2.6GS/s AD;
● Both ADC output and DAC input are JESD204B standard digital interfaces
● Scope of application: fully compliant with Vita57.1 specifications, including structural parts, daughter card size, panel connectors, height limits of front and back devices, etc., greatly improving the versatility and adaptability of daughter cards
● Multiple cooling methods: air cooling or conduction cooling
● Analog input and output are AC coupled
● Flexible clock selection: internal clock and external clock selection can be controlled by the carrier board
● HPC high pin count connector
● Working temperature: Commercial grade 0℃～ +70℃, industrial grade -40℃～ +85℃
Block Diagram
Front Panel
Front Panel Connector Description
| Serial number |
Signal |
describe |
| 1 |
CLK |
External clock input |
| 2 |
TRIG |
Trigger signal, configurable as IN or OUT |
| 3 |
DA2 |
Analog signal output channel 2 |
| 4 |
DA1 |
Analog signal output channel 1 |
| 5 |
AD1 |
Analog signal input channel 1 |
| 6 |
AD2 |
Analog signal input channel 2 |
Performance and indicators
| Analog Input |
| Number of channels |
Dual Channel |
| Resolution |
14bit |
| Full-scale input voltage |
1.1Vpp~2.0Vpp, typical value 1.7Vpp |
| Input Impedance |
50 ohm |
| Connector Type |
SSMC |
| Full power analog input bandwidth |
Max 9.0GHz |
| Performance Indicators |
FADC = 2.6Gsps, 1.7Vpp, Fin=1800MHz@-2dBFS:
SNR=59.7dBFS; SFDR=73dBFS |
| Analog Output |
| Number of channels |
Dual Channel |
| Resolution |
16bit |
| Full-scale output current |
16~26mA adjustable |
| Output Impedance |
50 ohm |
| Connector Type |
SSMC |
| Analog bandwidth |
Max 6.0GHz |
| Performance Indicators |
FDAC=12Gsps, FOUT=950MHz@-7dBFS , IOUTFS=20mA, SFDR=-75dBc; |
| External reference clock/sampling clock input (CLK) |
| Input Power |
-6dBm~ +6dBm |
| Input Impedance |
50 Ohm |
| Connector Type |
SSMC |
| Input frequency |
External reference clock: 10MHz ~800MHz; Internal reference clock: 10MHz
Sampling clock: Maximum 3GHz |
| External trigger/synchronization input (TRI) |
| Input/output power |
LVTTL/LVCMOS |
| Level Threshold |
VIH >2.0V, VIL < 0.6V |
| Connector Type |
SSMC |
| frequency |
Max 200MHz |
| Trigger Output (TRO) |
| Output level standard |
LVTTL/LVCMOS |
| Connector Type |
SSMC |
| Output frequency |
Max 200MHz |
| Onboard VCO |
| Reference clock frequency |
10MHz (default), optional |
| VCO output frequency range |
0.7GHz~6.39GHz, |
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