FMC303-Dual 14-bit 5.6Gsps DA FMC daughter card module

Item No.: 303
The FMC303 implements a wideband, dual-channel, 14-bit, 5.6GSPS (2.8gsps direct RF synthesis) DAC function, which can be clocked by an internal clock source (optionally locked to an external reference) or an externally provided sampling clock.
Description
1. Overview
The FMC303 implements a wideband, dual-channel, 14-bit, 5.6GSPS (2.8gsps direct RF synthesis) DAC function, which can be clocked by an internal clock source (optionally locked to an external reference) or an externally provided sampling clock. In addition, a trigger input is provided for the user to customize the sampling control. The FMC303 is mechanically and electrically compliant with the FMC standard (ANSI/VITA 57.1). The card has a multi-pin connector, front panel I/O, and can be used in a conduction-cooled environment. The design of the FMC303 is based on ADI's AD9129 single 14-bit 5.6GSPS digital-to-analog converter. The analog signal is coupled to the SSMB coaxial connector on the front panel in an AC manner. The FMC303 allows flexible control of the clock source through a serial communication bus. In addition, the card has its own power supply and temperature monitoring functions, and provides multiple power-saving modes that can cut off the power supply of unused functions to reduce the total power consumption at the system level. The card is suitable for low-power applications that require both maximum performance and low-power applications that do not affect mission range, such as airborne applications.

2. Performance indicators
1. 2 AD9129: 2-channel 14-bit D/A, up to 5.6GSPS (2.8Gsps without 2:1 interpolation) - LVDS;
2. Meet the requirements of VITA 57.1-2010;
3. Conduction cooling - standard option;
4. Single-ended AC coupled analog signal;
5. SSMB connector on the front panel;
6. Clock source, sampling frequency, calibration through SPI communication bus;
7. Flexible clock tree selection:
On-board VCO: 2300MHZ-2650MHZ
External reference clock
Internal sampling clock
8. It has multiple power-saving modes that can cut off the power supply of unused functions to reduce the total power consumption at the system level;
9. MIL-I-46058-C conformal coating compatible (optional);
10. HPC (multi-pin connector);
11. LVDS IO signal;
12. Applicable to major IP cores, it can automatically generate code and bitstream, making FPGA design easier;
13. Reference firmware design (VHDL);
14. Working temperature: levelA: 0°C to 70°C levelB: -40°C to 85°C
15. Storage temperature: levelA: -50°C to 125°C levelB: -50°C to 125°C
16. Working humidity: levelA: 0~100% levelB: 0~100%
17. Random vibration frequency: levelA: 0.1 g2 /Hz 10 - 3kHz levelB: 0.1 g2 /Hz 10 - 3kHz
18. Vibration: level A: 30g peak level B: 30g peak
19. Coating: level A: None level B: Conformal coating
3. Software Support
4. Application fields
Very wide bandwidth waveform generation, direct RF conversion, software defined radio (SDR), radar radio detection and acoustic location, ultra-wideband satellite digital receivers, media equipment, aerospace and test instrumentation.
5. Hardware test platform introduction
Can be used with KC705, VC707, 3U cPCI FC6301 and 3U VPX VP680; in addition, it can be used with any VITA 5