153- Full(Base) Camera Link signal source based on Sprtan6

Item No.: 153

1.An overview of the board card
The board card adopts the structure of single FPGA, and FPGA adopts XC6SLX45T-1FF484i of SPARTAN6 series of XILINX to realize the function output of one Camera Link to fiber in Full mode.

2. Main function and performance
Function Parameter Content
The function of Camera Link to optical fiber in Full mode
XC6SLX45T-1FF484I 2,088Kb Block RAM BlocksTwo MCB storage controllers, available IO for 358
Camera Link output MDR26 connector
Support RGBblack and white
eight bytes mode output, six bytes mode output, and so on
It has functions of simulate infrared, visible light, high frame rate, wide field of view, full HD 1080P image output.
The image data can be accumulated number, fringe, etc. It is used to replace the Camera link of Camera and verify acquisition card.
Size 69mm*130mm
Weight With heat sink
Power Supply +12V@ 0.5A
Power consumption 3W
Working temperature Industrial  -20℃ to +70℃
Storage temperature -20℃~ +70
Working humidity 10%80%

3. Software support 

Function Parameters of the content
Software Version Xilinx FPGA development softeareISE 14.7  Verilog
Test module Cam dtx The cam_dtx module sends 24-bit image data as well as rows, fields, data validity, and a vacancy. Since this is just a test program, it simply divides the 28-bit signal into a group of seven bits and sends the self-adding signal according to the clock beat.This module corresponds to DS90CR287 chip in Base mode.
cam_ctrl cam_ctrl module receives the four-digit control signal sent by the data signal receiver. The transmission mode and function of this control signal can be designed by the user according to their own needs.This module corresponds to the DS90LV031ATM chip.
SerT, SerT module is an asynchronous transceiver module, which sends SerTFG signal and receives SerTC signal. Users can also set it by themselves according to specific functions.
cam_dtx_Y_Z cam_dtx_Y_Z module sends a 56-bit image signal, which corresponds to the other two DS90CR287 chips in Full mode. The 28-bit signal is also divided into a group of seven bits, and the self-adding signal is sent according to the clock beat.
 4Application field
It is used to replace the camera link of camera and verify acquisition card.