1. Board overview
A quad 125M (optional 100Msps or 80Msps) frequency capture card that converts four high-speed analog data to the PCI-E bus. There is a high-performance AD chip (AD9253 or AD9653) with a sampling frequency of 125M, and the data output mode is LVDS serial mode, which provides X4 PCI-E interface, and the interface protocol adopts PCI-E2.0, which can achieve a maximum transmission rate of 1.6GB/s.
This board can be widely used in signal acquisition, glitch detection, pulse detection and other fields in the field of radar and communication.
2. technical indicators
| AD acquisition chip |
An AD9253 (or AD9653) chip is on-board to achieve a four-channel AD acquisition sampling rate of 125 MSPS (100 Msps or 80 Msps optional) and a resolution of 14 bits (16 bits when using the AD9653). |
| FPGA |
XC7A50TFGG484, it can be upgraded to 75T or 100T, which is suitable for filtering, decimation and sampling. |
| memory |
There are 2 DDR3 memories on board, each with 4Gbit and a 32-bit bus. |
| Specifications: |
SFDR：75.1dBFS at 9.7MHz Fin（125MSPS） SNR = 75.2dBFS at 30.5 MHz fIN (125 MSPS)SNR = 74.2dBFS at 70. MHz fIN (125 MSPS)SFDR = 90 dBc (to Nyquist) DNL = ±0.75 LSB (typical); INL = ±2.0 LSB (typical) Ni |
| Enter the signal |
THE INPUT CAN COLLECT FOUR-CHANNEL ANALOG SIGNALS AT THE SAME TIME, AND THE INPUT SIGNAL FREQUENCY IS NOT HIGHER THAN 2GHZ. The input impedance is matched to 50 ohms and an SMA connector is used. |
| Sampling frequency |
The maximum sampling rate is 125 MSPS, and the minimum sampling rate is 10 MSPS (20 MSPS with the AD9653 is selected), and both internal and external input sampling clocks can be used. |
| Adjustable sampling frequency |
The sampling clock can be adjusted as needed, from 10.00MHz to 125.00MHz, and the adjustment step can be KHz. |
| Enter the signal strength |
The standard configuration voltage value is not higher than 3.3V, which can be adjusted according to user needs. |
| Externally triggered |
5V input, opto-decoupled, TTL level, access to FPGA. |
| Bus interface |
PCI-E 2.0 ×4 |
| GPIO interface |
3 pairs of differential interfaces, 3.3V, 4 pairs of single-ended interfaces, 3.3V, TLLVTT level |
| Crystal oscillator |
On-board temperature-compensated crystal oscillator. |
| size |
Standard PCI-E |
3. Other debugging interfaces
1 JTAG debug interface, in the form of a single row of 1*6 pins Status indicator Test power supply on board 1 board program encryption chip with I2C interface. A single-ended external input clock can be connected directly to the AD (J1) and an external input clock can be connected to the FPGA (J18).
4. Physical size:
According to the standard PCIE board design (181.00mm*103mm).
5. The relevant software
provides Windows software driver. Set the Linux driver
Sixth, the order information:
serial number |
Product model |
disposition |
remark |
| 1 |
ORI 2602 Capture Card |
4-channel 100M sampling card，
FPGA A7 50T |
|
| 2 |
Signal processing software |
It can display data waveform, signal parameters, signal-to-noise ratio, etc |
|
| 3 |
ORI 7003 Dedicated Computer |
Portable computer, SMA interface, IO interface, etc |
|
| 4 |
ORI 7001 Dedicated Computer |
Portable all-in-one computer, monitor, keyboard, IO interface |
|
|
|
